Tag: #cpu
Writing on GPUs, LLMs, MLOps, Kubernetes — and mindset · 7 posts
7 posts are tagged #cpu; the most recent was published on 2026-08-09.
Often tagged together: #gpu 3 #performance 3 #cache 2 #computer-architecture 2 #hardware 2
Most read in the last 90 days:
A Single Instruction Can Take 62 Seconds — Latency Is a Property of the Path, Not of the Instruction
The Assembly Hall of Shame is a leaderboard for the competition to make a single instruction as slow as possible. At the bottom, nop takes 1 cycle; at the top, fxrstor64 takes 198 billion cycles, or 62 seconds. Read that
2026-08-09 · 11 min read #os-concepts#performance#cpu#microarchitecture#benchmarkThe Exact Scope of the Phrase x86 Hardware Backdoor — Reading rosenbridge as Its Author Wrote It
The repository title says hardware backdoors in x86 CPUs, but the body of the README states that the only thing believed to be affected is the VIA C3 and that later generations no longer carry the feature. In the disclai
2026-08-09 · 9 min read #security#hardware#x86#cpu#fuzzingCPU steal time and throttling — telling apart the st column in top, burstable credits, and CFS quota
CPU utilization reads 40%, yet p99 latency spikes and the st column in top shows 20%. Three completely different causes hide behind these look-alike symptoms: steal time, where the hypervisor does not hand a physical CPU
2026-07-26 · 17 min read #linux#cpu#cgroups#kubernetes#cloudMechanical Sympathy: Writing Code the Hardware Likes
Two pieces of code with the same time complexity can differ by tens of times in the real world, and the reason lives in the hardware. CPU caches (L1/L2/L3) and cache lines, data locality in arrays versus linked lists, br
2026-06-18 · 15 min read #performance#systems#cpuModern Computer Architecture — CPU Pipelines, Out-of-Order, Caches, Branch Prediction, Meltdown, Apple Silicon, ARM, RISC-V, SIMD, GPU Deep Dive (2025)
Why arrays beat linked lists, why a branch can be 10x slower, how M1 beat Intel. CPU pipelines, Out-of-Order, L1 to L3 caches, branch prediction, Meltdown/Spectre, Apple Silicon, ARM/x86/RISC-V, SIMD, GPU SM/Warp, HBM/CX
2026-04-15 · 15 min read #computer-architecture#cpu#cache#branch-prediction#apple-siliconSemiconductor Deep Dive -- Complete Guide to CPU, GPU, RAM, ASIC, and CUDA Architecture
How does a CPU execute instructions, how does RAM store data, and why are GPU/CUDA essential for AI? A deep dive from semiconductor fundamentals to ASIC custom chips.
2026-04-10 · 22 min read #ai#semiconductor#cpu#gpu#cudaComputer Architecture Complete Guide: From ISA to GPU Parallel Architecture ♪ Listenable
A comprehensive guide to computer architecture covering ISA, datapath, pipelining, cache memory, virtual memory, RISC-V, and GPU parallel architecture with code examples.
2026-03-17 · 23 min read #computer-architecture#cpu#gpu#pipeline#cache