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My Cable Has an Echo

Why do fast signals shrink even with matching resistors?

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In one line

Even if the termination resistance is right, the capacitance of an input pin reduces the fast components of a signal. This time, instead of measuring the round-trip time of a transmission line, you simplify a short connection into a lumped RC circuit and read the magnitude and phase at each frequency together. After generating the complex response with real ngspice, you find the relative bandwidth with respect to the passband. This model does not explain the reflections of a long line.

Why this was needed

In the previous lab the load was represented by a single resistor. A real input also has the property of storing charge, so even with the same load resistance, the response to a fast-changing input differs. If you think everything is solved just by matching the resistance, you miss cases where the signal cannot follow fast enough. Conversely, judging that there is no bandwidth because the first gain of the frequency analysis result is already −6dB is also wrong. The DC division and the extra attenuation with frequency are different phenomena. You must first decide what reference the dB is calculated against.

How it works

The circuit is input voltage source → source resistance Rs → receiving node. At the receiving node, the load resistance RL and the pin capacitor C are each connected to ground. Line delay, inductance, and nonlinear protection circuits are not included. Because the capacitor becomes an open circuit at DC, the DC gain H0 is RL/(Rs+RL). The resistance that determines the time constant is neither Rs alone nor Rs+RL but the parallel resistance Rth=Rs×RL/(Rs+RL). If you draw the two resistors the capacitor sees toward ground when the independent voltage source is set to 0, you can see why.

The pole frequency is fc=1/(2πRthC), and H(f)=H0/(1+jf/fc). If you entered C in pF, multiply by 1e−12 in the calculation to convert to F. With Rs=RL=50Ω and C=20pF, Rth=25Ω, H0=0.5, and fc≈318.31MHz. At fc the absolute magnitude is about 0.35355 and the phase is −45 degrees. The gain is about −9.0309dB on an absolute basis, but about −3.0103dB relative to H0. If you use −3 as the threshold as is, you cannot find the passband of this divider circuit.

The simulator sets the AC input to 1, so the complex output voltage equals the transfer function. The hre and him in the table are the real and imaginary parts and not two separate signals. The magnitude is computed as sqrt(hre²+him²), the voltage gain in dB as 20log10(magnitude), and the phase as atan2(him,hre) converted to degrees. If you use only the real part as the magnitude, or use 10log10 for a voltage ratio, you calculate a different physical quantity. If you use atan2 instead of atan, the quadrant is also preserved.

The frequency grid and the judgment criteria

If you calculate with 40 points per decade from 1MHz to 10GHz, there are 161 including the endpoints. The middle frequency of this grid is the geometric mean, not the arithmetic mean. For example, the midpoint on the log axis between 1MHz and 100MHz is 10MHz. The bandwidth extraction in this lab interpolates linearly between dB and log10(f). The complex response at a specified frequency, on the other hand, interpolates the real and imaginary parts separately on the same log axis. The interpolation method is also part of the definition of the result.

You find the half-power threshold relative to H0 in the first falling interval, and if there is no crossing in the observation range, you leave it as None. You must not invent the first frequency as the bandwidth from a table that is below the threshold from the start. Even if ngspice exited normally, you check separately the whole grid, the agreement with the complex model, and the experiment specification. In particular, if you flip only the sign of the imaginary part, the magnitude and bandwidth are the same but the phase is wrong, so a verification that compares only the magnitude misses that error.

What it looks like in the field

The specification set here is a bandwidth of 200MHz or more, a relative gain of −0.5dB or more at 100MHz, and a phase of −20 degrees or more. It is a learning judgment and not certification of a specific bus specification or data rate. The 50Ω/50Ω/20pF condition satisfies this with a relative gain of about −0.409dB and a phase of about −17.44 degrees, but if C becomes 40pF, the bandwidth and the other conditions get worse too. Lowering Rs can increase the bandwidth, but the line matching learned earlier can get worse. That is why you do not extend a good result from one lumped model into a good design of a whole board.

When you compare different source resistances, you do not combine gain and speed into one number. For example, keeping RL=50Ω and C=20pF and reducing Rs from 50Ω to 25Ω changes the DC gain from 0.5 to about 0.667 and the pole from about 318MHz to 477MHz together. If you look only at the output amplitude, you cannot tell whether the cause of the improvement is the division or the frequency attenuation. First compare the magnitude normalized by H0, and read the phase delay separately. Choosing to reduce the capacitance does not change the DC division under the same resistance conditions, so its effect differs from choosing to change the source resistance. In an experiment report, write both the variables you changed and those you held fixed so that you can trace cause and effect.

What you will do in the next lab

You implement, in order, the prediction formula, the TSV parser, magnitude and phase, bandwidth extraction, frequency interpolation, observation validation, and a six-condition experiment. The report also leaves the failed conditions and preserves the circuit, the raw response, and the engine log. You do not change the input settings to fit the observation or replace a wrong waveform with the analytical formula. It is not a real measurement, so measured is always false.

Official basis: AC analysis and wrdata in the ngspice manual. The document may change to a newer edition, and this lab is verified by running on the ngspice 42 fixed in the image.