A Compensated Display Still Leaves Circuit Loading

In one line

Matching the probe attenuation ratio corrects the voltage on the screen, and reducing the probe loading changes the circuit under measurement less. The two problems are different, so they must be verified separately.

Why this was needed

You have chosen the filter for the greenhouse sensor. But when you connect a probe to check the circuit, the fast changes get rounded and the peak changes. Someone says that since the probe is 10X, multiplying the screen value by 10 solves it. Will the original circuit really come back?

This time we will record three values at once. ref is the reference circuit with no probe connected, tip is the node where the real probe is connected, and meter is what arrives at the instrument input after passing through the probe. The display, which corresponds to the screen, is the value with the attenuation factor applied to meter. Even if the ratio is accurate, if tip itself has changed from ref, the measurement has affected the circuit.

This experiment is an ideal model at a low voltage of 1V. No high voltage is connected to a real probe or oscilloscope. It is not a product purchase recommendation or a verification of safety ratings either. Supply, bandwidth, slew rate, noise, ground-lead inductance, and cable transmission-line effects are items to verify separately next.

How it works

A large input resistance alone is not enough

A measurement input is not an infinite resistance. The input resistance draws current even at DC, and the input capacitance has a greater effect on fast changes. Tektronix's probe primer explains resistive and capacitive loading and compensation adjustment as separate things. This lab reproduces that distinction with its own circuit.

The source series resistance is 10kΩ, and the DUT is 100kΩ in parallel with 20pF. The DUT means the device under test, the circuit being measured. You make ref by attaching the same DUT to a separate, identical source-resistance branch. The two branches share only the ideal voltage source in front of them, so the probe connected to tip does not load ref.

The 1X model to compare is 1MΩ||100pF, and the active input model is 1MΩ||1pF. The output buffer of the active input is ideal. The two models have the same input resistance but different capacitance, so the distortion of the time response differs greatly. These numbers are not the specification of a specific product but experimental conditions declared for comparison.

The two time constants of 10X compensation

The 10X puts 9MΩ in parallel with a compensation capacitor Cp between tip and meter. From meter to ground there is 1MΩ||90pF. At DC the capacitors are open, so the divider of 9MΩ and 1MΩ makes meter 1/10 of tip. But as the frequency rises, the two capacitors take part in the division as well.

To match the time constants of the two parallel impedances, 9MΩ×Cp=1MΩ×90pF must hold. So the appropriate Cp for this model is 10pF. Then, regardless of frequency, meter/tip=0.1, and display=10×meter reproduces tip. If Cp is 5pF, the high-frequency display gets smaller, and if 20pF, it gets larger. If you judge the compensation to be right by looking only at the DC division, you miss this difference.

Even when the compensation is right, the DUT is looking at the probe input. The series equivalent of the two properly compensated capacitors is 9pF, and the DC resistance is 10MΩ. A capacitance that cannot be ignored is added next to the DUT's existing 20pF. The operation of multiplying the number by 10 does not remove this capacitor from the circuit.

Build a three-node model with impedances

Let s=j2πf and Yd=1/100kΩ+s×20pF; then the transfer function of the unloaded reference is Href=1/(1+RsYd). For the 1X or the active input, add Yp=1/1MΩ+sCp and compute Htip=1/(1+Rs(Yd+Yp)). Since the buffer is ideal, the Hmeter of these two kinds is equal to Htip.

For the 10X, Za=1/(1/9MΩ+sCp) and Zb=1/(1/1MΩ+s×90pF). The additional admittance the DUT sees is 1/(Za+Zb), so Htip=1/(1+Rs(Yd+1/(Za+Zb))). The instrument input is Hmeter=Htip×Zb/(Za+Zb). You must return the three values separately so that you can later explain at which point the distortion arose.

The real AC file contains four complex voltages including the input. After the frequency in the first column, the real and imaginary parts of each voltage follow, for 9 columns in total. The AC input uses a phase of 17 degrees and amplitudes of 0.5, 1, and 2V, so you must divide the original voltages by the complex input to compare them with the formulas above. An implementation that happens to be right in magnitude only when the input is 1V is not enough.

Magnitude error and complex error are different

The error of the measurement chain is set as |Hdisplay/Htip−1|, and the error of circuit loading as |Htip/Href−1|. These are the magnitude of the complex ratio minus 1. If you change it to the absolute value of |Htip/Href|−1, you discard the phase difference. A signal whose phase is rotated is not the same as the original even if its magnitude is exactly 1.

This is a comparison obtained from a preliminary experiment at 100kHz. They are theory and simulator results, not real measured values.

Condition	Display / loaded node magnitude	Display / unloaded node magnitude	Loading phase
1X	1.000	about 0.825	about −27.67 degrees
10X, compensation 5pF	about 0.527	about 0.524	about −1.52 degrees
10X, compensation 10pF	1.000	about 0.992	about −2.88 degrees
10X, compensation 20pF	about 1.818	about 1.790	about −5.21 degrees
Active input ideal model	1.000	about 0.990	about −0.26 degrees

Looking only at the displayed magnitude, the compensated 10X is a little closer to the original magnitude than the active input. But when you include the phase, the judgment changes. That is why the lab separately requires a chain complex error ≤0.01 and a loading complex error ≤0.02 at 100kHz. These thresholds are the verification contract of the experiment and not a universal industry pass criterion.

Also check the step waveform and the convergence of the calculation

The input is 0V until 1µs, rises to 1V over the next 5ns, and holds until 50µs. From the completion of the rise at 1.005µs, you linearly interpolate ref, tip, and display at 2,000 times at 10ns intervals. The maximum voltage difference between the display and the reference is about 0.124V even for the 10X with 10pF compensation, and about 0.019V for the active input model. A fast transient gives different information from the single point at 100kHz.

The lab also requires a maximum display/reference difference ≤0.03V over this observation interval. The unloaded reference circuit has an error of 0, but it is not a probe, so it is excluded from the choices. If you do not distinguish the comparison control from the real options, the control naturally always wins, which gives a wrong conclusion.

The calculation step and the observation step are separate. You use maximum calculation steps of 1.25ns and 0.625ns and interpolate again at the same observation times. You check whether the maximum difference of the two runs is 10µV or less at all three nodes. If you check only the display voltage, you can miss the error of the reference circuit. In the process of comparing everything, it also came to light that the narrower check of the earlier preliminary experiment was not sufficient.

What it looks like in the field

Keysight's explanation of calibration distinguishes reproducing the signal at the connected probe input from estimating the signal when the probe is absent. The correction of the former alone does not remove the loading effect. The ratio correction in this lab is at the level of reproducing the connected tip, and we do not use a signal estimated by software as evidence that the physical circuit itself was recovered.

To match the bench debugging, Python automation, validation planning, and data analysis requirements of the NXP analog validation role, you preserve the original circuit, input settings, waveforms, and judgment together. This lab alone does not prove all the skills of real instrument operation or PVT verification.

What you will do in the next lab

You write 8 steps, from configuration validation through parsing original files, the complex response, the impedance model, step interpolation, requirement judgment, the analysis report, and the condition-comparison CLI. You first leave all the conditions and both calculation precisions and explain in the report which requirement failed. Do not hide one of compensation, loading, or convergence to create a successful candidate.