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Electronics Foundations — Validating Sensor Inputs

ADC Acquisition Time and Channel Memory

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In one line

Even if a sensor outputs the correct voltage, if the ADC's sample capacitor has too little time to move to that voltage, the new channel carries a trace of the previous channel.

Why this was needed

You read two sensors in a space greenhouse alternately. The first sensor is at 1.8V and the second sensor is at 0.3V. The program clearly selected the second channel, yet the number corresponds to about 0.764V. Did you write the sensor address wrong, or did a cache remain? Both are possible hypotheses, but in this model the cause is the acquisition time of the analog input. Before fixing the code, you have to separate which state remains where.

The RC circuit of the earlier module stayed connected to the input all the time. Here the sample capacitor is connected to the input side only while the switch is closed. If you add the time the switch was open to the charging time, you put time you did not actually get into the calculation. A period of 1µs does not mean the capacitor follows the input for 1µs.

How it works

This educational circuit consists of an ideal voltage source, a source resistance Rs, a switch with an on-resistance of 100Ω, and a 20pF sample capacitor connected to ground. The capacitor's initial voltage is 0V. After acquiring the first channel's 1.8V twice, you change the input to 0.3V and acquire twice more. It does not connect a manufacturer model of a real sensor, multiplexer IC, or converter; it is a circuit that isolates the single phenomenon of input memory.

The time constant of the closed interval is τ=(Rs+Ron)C. With Rs=10kΩ, Ron=100Ω, and C=20pF, τ=202ns. If the previous voltage is Vold, the current input is Vtarget, and the closed time is T, the next voltage is Vtarget+(Vold−Vtarget)exp(−T/τ). At first Vold=0, but on the next acquisition you must use the immediately preceding result. A calculation that resets to 0 every time erases the channel's memory.

Even when the switch is off, the model's resistance is not infinite but 10¹²Ω. So there is a tiny leakage. The analytical formula ignores the leakage of the off interval, and when comparing with the simulation it allows a small difference. This is why we do not claim the two calculations are mathematically exactly the same. If the voltage moves a lot during the hold interval, first check whether the switch was really off and whether you picked the observation time wrong.

Even the number 200ns has a boundary

The control voltage begins rising after 100ns, and the rise and fall each take 1ns. The high-level width is 200ns, the repetition period is 1µs, and the switch threshold is 0.5V. The switch turns on midway through the rise and off midway through the fall. So the actual connection time is 201ns. If you use the high-level width and the actual connection time as the same variable, you end up looking for the cause of a small error outside the program.

The observation is made 25ns after the control voltage has fully fallen. The observation time of the k-th acquisition is 100ns+k×1µs+high-level width+27ns. Here the 27ns consists of 1ns of rise, 1ns of fall, and 25ns of waiting. The connection time in the analytical formula, on the other hand, uses width+1ns by the threshold criterion. The key point of this lab is that these are not the same time number.

Acquisition order Current input Voltage after acquisition in the nominal model Interpretation
First 1.8V About 1.135V Starts from 0V and is not yet fully charged
Second 1.8V About 1.554V Charged on from the previous voltage
Third 0.3V About 0.764V The previous channel's high voltage remains
Fourth 0.3V About 0.471V Approaches the new input but a difference remains

These numbers are not an answer file that replaces the later task. If you change the input, resistance, capacitance, and acquisition width, you must recalculate and read the real waveform. In particular, the field names high_v and low_v only mean the first and second channels, and there is no constraint that the former value is always higher. You must handle inputs that switch in the opposite direction too, so that you do not hardcode the cause to the magnitude of the values.

A waveform file having been created is not enough

ngspice calculates this circuit's voltages over time. The output has four columns: time, v(vin), v(gate), and v(hold). The first column is in seconds and the rest are in volts. The original input and the stored voltage are different nodes. If the analyzer reads the two columns swapped, it can create a very plausible false success in which every error comes close to zero.

When reading, check the header, the four columns, finite numbers, strictly increasing time, and the first and last times. Do not start the analysis just because the exit code is 0 or the file exists. While preparing this course, a run whose numerical settings were tightened too much exited with 0 even though the waveform did not reach the end. Having no data and a required condition having failed must be different results.

If the desired time lies between two rows, interpolate linearly. If you take the next row as is, a time bias arises in the intervals where the voltage changes quickly. Conversely, if the waveform ended at 2µs and you requested the value at 3.327µs, you do not pad it with the last voltage. That is not interpolation but groundless extrapolation. If there are duplicate times in the middle, the denominator can become 0, so the parser does not let it pass.

This implementation can read the whole waveform once and use binary search to find observation times. This can reduce the cost of repeated analysis compared with scanning the whole thing from the beginning for every sample. The provided helper leaves the simulator log, the circuit, the settings, and the waveform together in a new folder. To keep the next run from overwriting earlier evidence, it rejects an output folder that already exists.

Error, model, and convergence are three questions

The first question is how much the sample voltage differs from the target input. The educational code width is Vref/2ⁿ. At 3.3V and 12 bits, one LSB is about 805.664µV and half of it is about 402.832µV. Here you do not generate real conversion codes but divide the voltage error by this width. 4095 is the number of the maximum value, not the number of states in this convention.

The second question is whether the observation matches the circuit model we calculated. Find the maximum difference between the real waveform and the analytical formula that carries over the previous voltage, and check whether it is within 100µV. If it does not match, check the circuit, the initial conditions, the node selection, and the time axis first. Even if you copy the input voltage as is into the result and make only the target error 0, it must not be able to pass the model-agreement check.

The third question is whether the conclusion holds when you change the numerical step. Run the same condition with maximum time steps of 5ps and 2.5ps, and compare whether the maximum difference of the four samples is within 10µV. A convergence comparison has a different role from the analytical-formula check. That is because two runs can agree with each other even if both use the same wrong circuit. Conversely, the circuit may be right but the numerical step so coarse that the digits you would report are not stable.

The final judgment has a 10µV decision-margin band. If the absolute error plus 10µV is still at most half an LSB, it is pass; if the error minus 10µV is still greater than half an LSB, it is fail; and if it falls in between, it is borderline. Model disagreement is marked invalid_model for all four samples. You do not round borderline up to pass. This margin is an operating convention of this experiment and is not a strict upper bound on all numerical errors or a certified measurement uncertainty.

What it looks like in the field

In a condition comparison you must explain why you held the other variables fixed. The ideal model with the source resistance lowered to 100Ω at the same input and capacitance passed this half-LSB criterion. The 10kΩ model with the acquisition width increased to 350ns had a reduced error but did not get within the criterion. It is a simple case that distinguishes "improved" from "sufficient". Even if several conditions produce passing candidates, it does not mean you have chosen the part to use in a real product.

If you were designing a real buffer, you would additionally need to verify its output drive capability, noise, stability, input range, and supply conditions. This model has neither that buffer itself nor the ADC's charge injection, protection diodes, nonlinearity, or temperature variation. So you report it as "a condition that passed in the sample circuit" and do not guarantee real-hardware accuracy or safety. It is not a task that applies voltage to real equipment or connects a laser or power circuit.

NXP's analog validation role posting asks for an understanding of settling time and ADCs, Python automation, and datasheet-based validation planning and result analysis. This course was designed to practice a small validation cycle from that list and does not replace real silicon validation experience or the full requirements of that role.

What you will do in the next lab

You implement, in order, configuration validation, waveform reading, interpolation, observation, recursive prediction, error judgment, a single report, and a condition comparison with a CLI. The final report leaves the original configuration and observed values, the model difference, whether it converged, and the conditional candidates together. If you leave only the candidate number, you cannot explain again why you chose it. After actually running at least two conditions, cross-check the results for a case with a different input direction too.

Official sources and the scope of checking